Minimum qualifications:Bachelor’s degree in Computer Science, Electrical Engineering, a related field, or equivalent practical experience.3 years of experience with industry standard tools, languages and methodologies relevant to the development of silicon-based ICs and chips.Experience with SystemVerilog (i.e., SystemVerilog Assertions or functional coverage).Preferred qualifications:Master’s degree or PhD in Electrical Engineering.6 years of experience in design verification.Experience with industry-standard simulators, revision control systems and regression systems.Experienced with the full verification life cycle.
Minimum qualifications:
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