Our team, within Reality Labs at Meta, is dedicated to implementing hardware accelerators for compression algorithms. These accelerators are crucial for our Graphics Rendering Engine and Display Reprojection Pipeline, helping us adhere to stringent power and area constraints. We are pioneering advancements in personal computing and challenging conventional industry beliefs about the potential of smart wearable technology, with a focus on developing the next generation of AR glasses.We are looking for upcoming engineers who have interest in custom RTL development and hardware acceleration....

Our team, within Reality Labs at Meta, brings novel experiences to life on Meta’s AR devices, e.g. Orion. We were closely involved in the development of multimodal Meta AI on Orion, and we are currently working on the next gen AR glasses.We are looking for upcoming engineers with great interest in embedded software development and hardware acceleration to enable on-device contextual AI within the performance, power and form-factor constraints of AR glasses....

Meta is seeking an ASIC Engineer, Architecture to join our Infrastructure organization. Our servers and data centers are the foundation upon which our rapidly scaling infrastructure efficiently operates and upon which our innovative services are delivered. By holding this role, you will be an integral member of an ASIC team to build accelerators for some of our top workloads enabling our data centers to scale efficiently. You will have an opportunity to work with AI/ML and video codec experts in the company, help architect state-of-the art machine learning accelerators and contribute to modeling these accelerators....

Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge ASICs in fields such as machine learning, video transcoding and network acceleration. We are looking for talented individuals with deep experience that span one or more of the key areas required to build successful world-class complex SoC and IP for data center applications.ASIC Engineer, Design Responsibilities:Architecture exploration.Micro-architecture development.RTL development using Verilog, System Verilog and HLS.Soft and hard IP identification, selection and integration....

Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification Engineer, you will be part of a dynamic team working with the best in the industry, focused on developing innovative ASIC solutions for Facebook’s data center applications. You will be responsible for the verification closure of a design module or sub-system from test-planning, UVM based test bench development to verification closure....

Meta is hiring ASIC Emulation Engineers within our Infrastructure organization. We are looking for individuals with experience in HW emulation and prototyping required to build System on Chip (SoC) and IP for data center applications.ASIC Engineer, Emulation Responsibilities:Develop emulation testbenches in System Verilog and/or C/C++.Deliver emulation and prototyping models from RTL on industry standard emulation and prototyping platforms.Build and execute emulation test plan to ensure quality of the models and assist pre-silicon validation....

Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization. We are looking for individuals with experience in front-end implementation from RTL to netlist, including RTL Lint, CDC analysis, timing constraints, synthesis to build efficient System on Chip (SoC) and IP for data center applications.ASIC Engineer, Implementation Responsibilities: Want more jobs like this?GetjobsinBangalore, Indiadelivered to your inbox every week. Want more jobs like this? GetjobsinBangalore, Indiadelivered to your inbox every week....

Meta is hiring ASIC Engineers within the Infrastructure organization. We are looking for individuals with experience in the entire Silicon Lifecycle to build and scale silicon for data center applications.As an ASIC Engineer in the Silicon Lifecycle Engineering team, you will be part of a dynamic team working with the best in the industry, focused on developing and supporting innovative ASIC solutions for Facebook’s data center applications. The role also involves partnering with Full Stack Software, Hardware, ASIC Design, Verification, Emulation, Pre/Post-Silicon Validation & Systems teams to deliver reliable and performant silicon to our applications....

Meta is hiring ASIC Engineers within the Infrastructure organization. We are looking for individuals with experience in the entire Silicon Lifecycle to build and scale silicon for data center applications.As an ASIC Engineer in the Infra Silicon Enablement team team, you will be part of a dynamic team working with the best in the industry, focused on developing and supporting innovative ASIC solutions for Meta’s data center applications.ASIC Engineer, Infra Silicon Enablement Responsibilities:Work across all aspects of silicon lifecycle to deliver reliable and performant silicon solutions - from early architecture and design inputs, pre-silicon validation, bring-up and post-silicon characterization and deployment in fleet....

Meta is hiring ASIC Power Engineers within our Infrastructure organization to work on power/performance optimizations from SOC Architecture to System level. We are looking for individuals with experience in power architecture definition and power management for large complex disaggregated ASICs, with exposure to power modeling, developing flows around EDA tools, and low-power design to build efficient System on Chip (SoC) and IP for data center applications.ASIC Engineer, Power Responsibilities:Work with Architecture and Design teams to assess power/performance tradeoffs at design/arch/process-tech levels and drive for solutions for Meta workloads....

We are seeking a highly skilled and experienced DFT Engineer to join our team. The ideal candidate will have a strong background in Design for Testability (DFT) methodologies and implementation, with a deep understanding of Siemens/Synopsys DFT EDA tools and IEEE standards (1149, 1500, 1687). The role will involve developing and implementing DFT strategies for complex mixed-signal integrated circuits (ICs), ensuring high fault coverage and testability.ASIC Implementation DFT Responsibilities:Develop and implement DFT strategies for mixed-signal ICs, considering factors such as fault coverage, test time, and in-system test....

Meta is looking for an experienced ASIC Packaging Engineer, Mechanical/Thermal modeling focus for its ASIC packaging team to support the development of custom Silicon for Infrastructure as well as to develop packaging solutions that are optimal for our ASIC roadmap. We are building a competency in Packaging technology to support the development of custom silicon and looking for expertise in hardware development and integration of machine learning clusters, both server and fabric with focus on the impact they can create as part of a world-class engineering team....

Want more jobs like this?GetjobsinSan Diego, CAdelivered to your inbox every week. Want more jobs like this? GetjobsinSan Diego, CAdelivered to your inbox every week. Get Jobs DescriptionIn this role, and as part of our team, you are going to work on power modeling, analysis and correlation tasks for wireless communication SoCs, including: • Define power-efficient SOC architecture and schemes, write power spec. • Estimate pre-silicon power, build wireless application and atomic power model with high accuracy....